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SN74HC112N

Name: Texas Instruments SN74HC112N
Brand: Texas Instruments
SKU: 595-SN74HC112N
Price: 1.07 EUR
Availability: InStock

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Mouser No:

595-SN74HC112N

Mfr. No:

SN74HC112N

Mfr.:

Texas Instruments

Description:

Flip-Flops Dual

Datasheet:

SN74HC112N Datasheet

ECAD Model:

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More Information

Learn more about Texas Instruments SN74HC112N

In Stock: 2.706

Stock:: 2.706 Can Dispatch Immediately

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Factory Lead Time:: 12 Weeks Estimated factory production time for quantities greater than shown.

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Pricing (EUR)

Qty.	Unit Price	Ext. Price
	1,07 €	1,07 €
	0,767 €	7,67 €
	0,691 €	17,28 €
	0,61 €	61,00 €
	0,571 €	142,75 €
	0,547 €	273,50 €
	0,468 €	468,00 €
	0,44 €	1.100,00 €
	0,413 €	2.065,00 €

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Texas Instruments
Product Category:	Flip-Flops
RoHS:
Logic Type:	J-K Type Flip-Flop
Logic Family:	HC
Number of Circuits:	2 Circuit
Output Type:	CMOS
Package/Case:	PDIP-16
Input Type:	CMOS, LVTTL
Polarity:	Inverting/Non-Inverting
Propagation Delay Time:	125 ns
High Level Output Current:	- 4 mA
Low Level Output Current:	4 mA
Supply Voltage - Min:	2 V
Supply Voltage - Max:	6 V
Mounting Style:	Through Hole
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 85 C
Packaging:	Tube
Brand:	Texas Instruments
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	MX
Number of Input Lines:	2
Number of Output Lines:	3 Line
Product Type:	Flip Flops
Series:	SN74HC112
Factory Pack Quantity:	25
Subcategory:	Logic ICs
Unit Weight:	1 g

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Logic Guide (Rev. AB)

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TARIC:: 8542319000
CNHTS:: 8542399000
CAHTS:: 8542390000
USHTS:: 8542390090
JPHTS:: 8542390990
MXHTS:: 8542399999
ECCN:: EAR99

SN74HC112 Dual J-K Flip-Flops

Texas Instruments SN74HC112 Dual J-K Flip-Flops contain two independent J-K negative-edge-triggered flip-flops. A low level at the clear (/CLR) inputs or preset (/PRE) resets or sets the outputs, no matter the levels of the other inputs. The data at the J and K inputs that meet the setup time requirements are transferred to the outputs on the negative-going edge of the clock (CLK) pulse when /CLR and /PRE are inactive (high). Clock triggering is not directly related to the fall time of the CLK pulse and occurs at a voltage level. The J and K input data may be changed without affecting the levels at the outputs following the hold-time interval. The Texas Instruments SN74HC112 are versatile flip-flops that perform as toggle flip-flops by tying J and K high.