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SN74LV8T373MPWREP

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Mouser No:

595-SN74LV8T373MPWRE

Mfr. No:

SN74LV8T373MPWREP

Mfr.:

Texas Instruments

Description:

Latches Enhanced product oct al transparent D-ty

Lifecycle:

New Product:

New from this manufacturer.

Datasheet:

SN74LV8T373MPWREP Datasheet

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Learn more about Texas Instruments SN74LV8T373MPWREP

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Texas Instruments
Product Category:	Latches
Delivery Restriction:	Mouser does not presently sell this product in your region.
RoHS:
Logic Type:	D-Type
Logic Family:	LV
Number of Circuits:	8 Circuit
Package/Case:	TSSOP-20
Polarity:	Non-Inverting
Supply Voltage - Min:	1.65 V
Supply Voltage - Max:	5.5 V
Minimum Operating Temperature:	- 55 C
Maximum Operating Temperature:	+ 125 C
Packaging:	Reel
Packaging:	Cut Tape
Brand:	Texas Instruments
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	MY
Mounting Style:	SMD/SMT
Number of Channels:	8 Channel
Operating Supply Current:	10 uA
Product Type:	Latches
Series:	SN74LV8T373
Factory Pack Quantity:	3000
Subcategory:	Logic ICs
Supply Current - Max:	10 uA

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Datasheet

SN74LV8T373MPWREP Datasheet

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TARIC:: 8542319000
USHTS:: 8542390090
ECCN:: EAR99

SN74LV8T373-EP Octal Transparent D-Type Latch

Texas Instruments SN74LV8T373-EP Octal Transparent D-Type Latch is designed for 2V to 5.5V V_CC operation. The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. The 5V tolerant input pins also enable down translation when the input voltage is larger than the supply voltage. The output level always references the supply voltage (V_CC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels. The Texas Instruments SN74LV8T373-EP devices have gold bond wires, a temperature range of –55 to +105°C, and an SnPb lead finish.

SN74LV8T373/Q1 Translating D-Type Flip-Flops

Texas Instruments SN74LV8T373/SN74LV8T373-Q1 Translating Octal D-Type Flip-Flops include eight D-type latches with all channels sharing a Latch Enable (LE) input and Output Enable (OE) input. The input circuit uses a reduced threshold design to enable voltage level up-translation when the supply voltage (V_CC) is higher than the input voltage. The output is always referenced to VCC, supporting CMOS logic levels of 1.8V, 2.5V, 3.3V, and 5V. The SN74LV8T373/SN74LV8T373-Q1 flip-flops operate at a 1.65V to 5.5V wide supply voltage range, 5.5V-tolerant input pins, and support standard function pinout. These flip-flops are available in a wettable flank QFN package with Latch-up performance exceeding 250mA per JESD 17. The SN74LV8T373-Q1 devices are AEC-Q100 qualified for automotive applications. Typical applications include parallel data storage and a digital bus buffer.